1. Field of the Invention
This invention relates to the field of methods of mounting I.C. chips on substrates, and more particularly relates to methods for mounting integrated circuit (I.C.) chips with their active face toward the substrate on which mounted.
2. Description of the Prior Art
I.C. chips, or dies, are generally packaged as either discrete devices, one chip per package, or as part of a multichip hybrid circuit, or hybrid package, where a plurality of I.C. chips is mounted in one such package. The chips mounted in hybrid packages are frequently of different types. Each such hybrid package may be treated as a building block for complex electronic circuits and systems such as general purpose digital data processing systems.
In producing hybrid packages, an approach that lends itself to automating the process of mounting large scale I.C. chips on a multilayer substrate involves producing flexible beam lead frames which are laminated to a strip of thin plastic material such as 35 mm film. The input/output (I/O) terminals on the active face of an I.C. chip are bonded to inner lead bonding sites of the leads at the inner end of each lead of a lead frame. To mount such I.C. chips on a substrate, typically a substrate will have an alumina base and multiple layers of conductors and dielectrics, the I.C. chips and a portion of their leads are blanked from the lead frames and the film segments to which each frame is attached. The outer lead bonding sites of the leads attached to each I.C. chip are formed to produce a foot at the free end of each such lead and the outer lead bonding sites, the bottom surface of each such foot is substantially parallel to the active face of the I.C. chip but is displaced so as to be automatically aligned with the back face of the chip. The back faces of such chips are metallized so that essentially simultaneously the back faces can be soldered to a metallized chip pad on the surface of a substrate and the outer lead sites of the leads to the outer lead pads of the substrates, typically by a reflow soldering process.
The problems associated with the prior art methods of packaging I.C. chips having flexible beam leads particularly when mounted on a fired multilayer substrate are the result of the additional manufacturing steps needed to mount such I.C. chips on such a substrate in this manner, such as metallizing the back space of the I.C. chip and forming the leads of the chip so that the outer bond sites of the leads will contact the I/O pads associated with it each chip site of a substrate. Each manufacturing step has associated with it a cost that must be reflected in the ultimate cost of the product and normally each additional manufacturing step will decrease the reliability of the package. In addition, the prior art methods impose the requirement that the I.C. chips have a substantially uniform thickness which thickness has to be maintained with a high degree of accuracy in order to obtain good outer lead bonds, where an outer lead bond is the bond between the outer lead bonding site of the leads and the OL pads of the substrate. Since the active face of each I.C. chip with its I/O terminals to which the inner lead bonding sites of the leads are bonded are exposed in packages produced by the relevant prior art processes, both the active faces of the chips and their leads are subject to mechanical damage, as well as chemical attack or corrosion. Prior art processes also resulted in edge shorts which occur if a lead touches an outer edge of the active face of an I.C. chip, for example. It also should be noted that the strength of the inner lead bonds between the inner lead bonding sites of the leads and the I/O terminals of the chips are physically weaker, i.e., they fail at lower tensile stresses than the outer lead bonds between the outer lead bonding sites of the bonds and the outer lead pads to which they are joined.
It is, therefore, an object of this invention to provide an improved process for mounting I.C. chips on a substrate which is less costly and produces more reliable packages at lower cost.
It is yet another object of this invention to provide a process in which the thickness of the I.C. chips mounted on the substrate is not a critical parameter.
It is yet another object of this invention to provide a process for mounting I.C. chips on a substrate in which the step of metallizing the back surface of the chips may be eliminated.
It is yet another object of this invention to provide a process for mounting I.C. chips on a substrate which provides mechanical and environmental protection for the active face of the chip and the inner lead bonds of the leads to the I/O terminals of the chip.
It is still another object of this invention to provide a process for mounting an I.C. chip on a substrate in which no corrosive chemicals are used.
It is a further object of this invention to provide a process for mounting an integrated circuit chip on a substrate in which the strength of the inner leads bonds of the chips are enhanced.